rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective companies. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? 2003 analog devices, inc. all rights reserved. add8702 12-channel gamma buffers with v com buffer pa n e l timing controller timing and control scan driver control gamma reference vo ltages gamma v com r 384 source driver n o. 1 768 scan drivers tft color panel 1024 768 384 source driver n o. 2 384 source driver no. 8 add8702 g b figure 1. typical svga tft lcd application functional block diagram gnd v dd vgma6 vgma5 vgma4 vgma3 vgma2 vgma1 24 23 22 21 20 19 18 17 v dd v com adj v com out v high v in 6 v in 5 v in 4 v in 3 v in 2 v low v dd gnd v in 11 v in 10 v in 9 v in 8 v in 7 gnd vgma12 vgma11 vgma10 vgma9 vgma8 vgma7 9 10 11 12 13 14 15 16 32 31 30 26 28 27 26 25 1 2 3 4 5 6 7 8 features programmable 12-channel gamma reference generator mask programmable adjustable v com buffer upper/lower outputs swing to v dd /gnd continuous output current: 10 ma v com peak output current: 250 ma outputs with fast settling time for load change output pins are compatible with add8701 single-supply operation: 7 v to 16 v supply current: 15 ma max applications tft lcd panels general description the add8702 is a low cost, mask programmable, 12-channel gamma reference generator, plus an adjustable v com driver. this part is designed to provide gamma correction for high resolution tft lcd panels. the 12 gamma reference levels and v com are mask programmable to 0.3% resolution using the on-chip 500 chain resistor string. this reduces component and board costs. the add8702 provides a complete programmed set of gamma voltage references for the lcd source drivers. these references settle quickly to load change. the v com output is stable with high capacitive loads and can source or sink 250 ma peak cur- rent. the v com output level can be adjusted using an external trim-potentiometer or discrete resistors. the output pins are compatible with the add8701. this allows for single board design and fast turns for prototyping using the initial add8701 board design. the add8702 is specified over the temperature range of ?0 c to +85 c and comes in the 32-lead lead frame chip scale pack- age (lfcsp) for compact board space.
rev. 0 ? add8702?pecifications electrical characteristics parameter symbol conditions min typ max unit output accuracy v system error v sy error 10 50 mv mask programmable resistor string total resistor string r total 500 elements v low to v high 22.5 k ? resistor matching r match any two segments 1 % output characteristics output voltage high v out i l = 100 a 15.995 v (vgma11, vgma12) i l = 5 ma 15.85 15.95 v ?0 c t a +85 c 15.75 v output voltage mid v out i l = 5 ma 14.6 v (vgma3 to vgma10) output voltage low v out i l = 100 a5mv (vgma1, vgma2) i l = 5 ma 50 150 mv ?0 c t a +85 c 250 mv continuous output current i out 10 ma peak output current i pk 150 ma settling time?oltage t s 1 v step 0.1%, r l = 10 k ? , c l = 200 pf 1 s v com characteristics continuous output current i out 35 ma peak output current i pk 250 ma settling time?oltage t s 1 v step 0.1%, r l = 10 k ? , c l = 200 pf 0.8 s supply characteristics supply voltage v dd 716v power supply rejection ratio psrr v s = 6 v to 17 v, ?0 c t a +85 c6875 db supply current i sys no load 11 15 ma ?0 c t a +85 c16ma specifications subject to change without notice. (v dd = 16 v, t a = 25 c, unless otherwise specified.)
rev. 0 add8702 ? caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the add8702 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. absolute maximum ratings * supply voltage (v s ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v storage temperature range . . . . . . . . . . . . . e65 c to +150 c operating temperature range . . . . . . . . . . . . e40 c to +85 c junction temperature range . . . . . . . . . . . . . e65 c to +150 c lead temperature range (soldering, 60 sec.) . . . . . . . . 300 c esd tolerance (hbm) . . . . . . . . . . . . . . . . . . . . . . . 1,000 v * stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. ordering guide temperature package package model range description option ADD8702ACP-R2 ?0 c to +85 c 32-lead lfcsp cp-32 add8702acp-reel ?0 c to +85 c 32-lead lfcsp cp-32 add8702acp-reel7 ?0 c to +85 c 32-lead lfcsp cp-32 package type ja 1 jb 2 unit 32-lead lfcsp (cp) 35 13 c/w notes 1 ja is specified for worst-case conditions, i.e., ja is specified for device soldered in circuit board for surface-mount packages. 2 jb is applied for calculating the junction temperature by reference to the board temperature. pin configuration pin 1 indicator top view 24 gnd 23 v dd 22 vgma6 21 vgma5 v dd 1 v com adj 2 v high 3 32 v com out 20 vgma4 19 vgma3 18 vgma2 17 vgma1 v in 6 9 v in 5 10 v in 4 11 v in 3 12 v in 2 13 v low 14 v dd 15 gnd 16 v in 11 4 v in 10 5 v in 9 6 v in 8 7 v in 7 8 31 gnd 30 vgma12 29 vgma11 28 vgma10 27 vgma9 26 vgma8 25 vgma7 add8702 pin function descriptions pin no. mnemonic description 1, 15, 23 v dd power (+) 2v com adj v com adjust input 3v high highest gamma input voltage 4?3 v in 11? in 2g amma buffer inputs 14 v low lowest gamma input voltage 16, 24, 31 gnd power (? 17?2, 25?0 vgma1?gma12 gamma buffer outputs 32 v com out v com buffer output
rev. 0 ? add8702?ypical performance characteristics supply voltage (v) supply current (ma) 12 10 0 04 16 812 8 6 4 2 t a = 25 c tpc 1. supply current vs. supply voltage frequency (hz) 30m 100k gain (db) 1m 10m 10 0 ?0 ?0 ?0 ?0 v dd = 16v gamma 10 to 12 2k , 10k 150 tpc 4. frequency response vs. resistive loading frequency ( hz ) 30m 100k gain (db) 1m 10m 20 0 ?0 ?0 10 v dd = 16v gamma 10 to 12 50pf ?0 100pf 340pf 540pf 1040pf tpc 7. frequency response vs. capacitive loading temperature ( c) supply current (ma) 12 11 5 ?0 85 25 8 6 7 10 9 v dd = 16v tpc 2. supply current vs. temperature frequency (hz) 30m 100k gain (db) 1m 10m 10 0 ?0 ?0 ?0 ?0 v dd = 16v v com 2k , 10k 150 ?0 tpc 5. frequency response vs. resistive loading frequency (hz) 30m 100k gain (db) 1m 10m 20 0 ?0 ?0 10 v dd = 16v v com 50pf ?0 100pf 340pf 540pf 1040pf tpc 8. frequency response vs. capacitive loading frequency (hz) 100k 30m gain (db) 1m 10m 10 0 ?0 ?0 ?0 ?0 2k , 10k 150 v dd = 16v gamma 1 to 9 tpc 3. frequency response vs. resistive loading frequency ( hz ) 30m 100k gain (db) 1m 10m 20 0 ?0 ?0 10 v dd = 16v gamma 1 to 9 50pf ?0 100pf 340pf 540pf 1040pf tpc 6. frequency response vs. capacitive loading capacitive load (pf) phase shift (degrees) 180 40 0 200 1,200 400 600 800 1,000 160 140 120 80 60 100 v dd = 16v gamma 1 to 12 r l = 2k gamma 12 gamma 1 tpc 9. input and output phase shift vs. capacitive load
rev. 0 add8702 ? temperature ( c) slew rate (v/ s) 16 14 0 ?0 85 25 8 6 2 4 12 10 v dd = 16v r null = 33 c l = 100pf v com slew rate rising v com slew rate falling tpc 11. slew rate vs. temperature time (ns) 11 3 0 ?00 1,800 200 600 1,000 1,400 10 4 2 1 6 5 8 7 9 amplitude (v) v dd = 16v gamma = 11 1 f 10 f 120pf 320pf 520pf tpc 14. transient load response vs. capacitive load load current (ma) output voltage error (mv) 0.001 0.01 100 0.1 1 10 1,400 1,200 0 1,000 800 600 400 200 v dd = 16v gamma 10 to 12 sink source tpc 17. output voltage error vs. load current 7v < v dd < 16v r null = 33 c l = 0.1 f time (20 s/div) vo lta ge (20mv/div) tpc 12. small signal transient response time (ns) 11 3 0 ?00 1,800 200 600 1,000 1,400 10 4 2 1 6 5 8 7 9 amplitude (v) v dd = 16v v com 1 f10 f 320pf 120pf 520pf tpc 15. transient load response vs. capacitive load load current (ma) output voltage error (mv) 0.001 0.01 100 0.1 1 10 50 45 0 35 25 15 5 v dd = 16v v com sink source 10 20 40 30 tpc 18. output voltage error vs. load current time (2 s/div) vo lta ge (2v/div) v dd = 16v r l = 10k c l = 100pf tpc 10. large signal transient response time (ns) 11 3 0 ?00 1,800 200 600 1,000 1,400 10 4 2 1 6 5 8 7 9 amplitude (v) v dd = 16v gamma = 2 1 f 10 f 120pf 320pf 520pf tpc 13. transient load response vs. capacitive load load current (ma) output voltage error (mv) 0.001 0.01 100 0.1 1 10 100 90 0 80 70 60 50 40 30 20 10 v dd = 16v gamma 1 to 9 sink source tpc 16. output voltage error vs. load current
rev. 0 ? add8702 frequency (hz) power supply rejection ratio (db) 100 1k 10m 10k 100k 1m 80 60 ?20 40 20 0 ?0 ?0 ?0 ?0 ?00 psrr all channels v dd = 8v t a = 25 c tpc 20. power supply rejection ratio vs. frequency vo ltag e noise density (nv/ hz) v dd = 16v bu ffers 10 to 12 marker set @ 10khz marker reading = 36.6nv/ hz frequency ( hz ) 0510 15 20 25 ?0 0 10 20 30 40 50 60 70 tpc 23. voltage noise density vs. frequency time (40 s/div) vo lta ge (3v/div) tpc 21. no phase reversal output voltage error (mv) frequency (no. of amplifiers) 6,000 3,000 0 ?2 ?4 ? 2 10 1 82634 5,000 4,000 2,000 1,000 v dd = 16v t a = 25 c all channels tpc 19. output voltage error distribution vo ltag e noise density (nv/ hz) v dd = 16v v com and buffers 1 to 9 marker set @ 10khz marker reading = 25.7nv/ hz frequency ( hz ) 0510 15 20 25 ?0 0 10 20 30 40 50 60 70 tpc 22. voltage noise density vs. frequency
rev. 0 add8702 ? applications figure 1 is a block diagram of the configuration of an xga- compatible (1024 768) tft color panel with the add8702 providing gamma correction reference voltages to the source drivers and an integrated v com driver for lcd common node. buffer 16v r null c t r l figure 2. bandwidth measurement information panel size and resolution determine the number of gamma reference voltages required. for a 256-grayscale level, 8-bit color scheme, 6 2 external reference nodes should be sufficient to match the characteristics of the lcd driver to the characteristics of the actual lcd panel for improved picture quality. external reference gamma correction voltages are often generated using a simple resistor ladder. using the add8702, the resistor ladder is incorporated in the ic for reduced cost and number of components. buffer 16v 5v 33 1k 10v 5v 0v 0.1 s v th v th figure 3. transient load regulation test circuit the add8702 is designed to meet the rail-to-rail capability needed by the application, yet offers the lowest cost per channel solution. the add8702 gamma buffers offer 10 ma continuous drive current capability. to be more competitive, the design maximizes the die area by allowing specific channels to swing to the positive rail and negative rail. so it is imperative that the channels swinging close to the supply rail be used for the posi- tive gamma references and the channels swinging close to gnd be used for the negative gamma references. the v com buffer can handle up to 35 ma continuous output current and can drive up to 1,000 pf pure capacitive load. provision is available to adjust the v com voltage to a desired level. r efer to figure 4 for an example of an application circuit for adjusting the output of the v com buffer. positive gamma references gma 12 gma 11 gma 10 gma 9 gma 8 gma 7 gma 6 gma 5 gma 4 gma 3 gma 2 gma 1 add8702 lcd source driver negative gamma references a1 lcd common plane v com amp 2k 32k v dd gnd v com adjust a5 a4 a3 a2 a10 a8 a7 a6 a9 a12 a11 v low v in 5 v in 4 v in 3 v in 2 v in 10 v in 8 v in 7 v in 6 v in 9 v high v in 11 figure 4. application circuit table i. add8702 ?000 mask option, resistor tap points (0 500) v dd = 12.5 v, v high = 12.5 v, and v low = gnd tap point ( ) voltage unit vgma1 8 0.2 v vgma2 57 1.43 v vgma3 84 2.11 v vgma4 115 2.89 v vgma5 139 3.48 v vgma6 194 4.86 v vgma7 218 5.45 v vgma8 298 7.45 v vgma9 371 9.29 v vgma10 418 10.45 v vgma11 442 11.04 v vgma12 488 12.2 v v com 200 5 v
rev. 0 c03820??/03(0) ? add8702 32-lead lead frame chip scale package [lfcsp] (cp-32) dimensions shown in millimeters compliant to jedec standards mo-220-vhhd-2 0.30 0.23 0.18 0.20 ref 0.80 max 0.65 nom 0.05 max 0.02 nom 12 max 1.00 0.90 0.80 seating plane coplanarity 0.08 1 32 8 9 25 24 16 17 bottom view 0.50 0.40 0.30 3.50 ref 0.50 bsc pin 1 indicator top view 5.00 bsc sq 4.75 bsc sq sq 3.25 3.10 2.95 pin 1 indicator 0.60 max 0.60 max outline dimensions
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